Hi,
Hope
you are doing great,
This
is Syed Layeeq from New York Technology Partners. We have a requirement for Verification Engineer at Folsom, CA.
Please review the Job description below and if you’d like to pursue this,
please include a word copy of your latest resume along with a daytime phone
number and rate in your response. You can also reach me at (201) 680-0200 x
7027.
Job Title: Verification
Engineer
Location: Folsom, CA
Duration: 6+ months
Experience:
- 4 - 5 years in Pre-silicon Verification with USB 3.0 IO experience
- Skills; System Verilog, OVM
Verification of
2LM-FMSS includes:
- Code and execute test sequences and testcases to verify different clusters.
- Enhance and develop testbench components in the Verification Environment.
- Working on regression debug of failing test cases.
- Improve coverage and write coverpoints.
- Experienced candidates with System Verilog, OVM is a must.
- Highly preferred to have recent Intel experience in SIP/SoC presilisocn validation.
Thanks and Regards,
Syed Layeeq
New York Technology
Partners – Rochester
332 Jefferson Rd.
Rochester, NY 14623
T1: (201) 680-0200 x
7027
Fax: (201) 474-8533
8 syed@nytpartners.com
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